C Ballistic Deflection Transistor and T - Junction Research CNF Project

An investigation of non-linear ballistic transport is being conducted, two device structures are investigated, a ballistic deflection transistor and a t-junction device. The transistor structure demonstrates a novel device that produces large small-signal gains in excess of 150. The t-junction structure was used to investigate the impact of ballistic transport versus upper valley transfer. A ballisticity factor is used to characterize and explain the results. Summary of Research: We are conducting research on a novel transistor structure we termed the ballistic deflection transistor (BDT). This device can in many ways be thought of as a semiconductor implementation of a cathode ray tube (CRT) that is restricted to just two dimensions. The BDT is fabricated in an InGaAsInAlAs heterostructure material system, that facilitates a high mobility 2-dimensional electron gas (2DEG). Transistor features are formed by using e-beam lithography for patterning and an ion mill to etch the material system. The transistor functions by combining several effects. The lateral gates along the channel direct electrons to either the left or right drain (see Figure 1). The top center bias point aids in adjusting the gain by enhancing the electric field. In order for the transistor to function, an additional bias potential is required on at least one drain port. By applying differential input voltages on the two gates, electrons are steered into one channel or the other. Large differences in voltage between the two gates results in a pinch-off effect, much in the same way a CRT would behave under the same circumstance. An increase in the drain voltage of the center bias voltage results in an increase in the electron energy/velocity. This leads to an improvement of the transconductance of the device. Placing a central deflector below the top port forces current to be directed into one channel or the other while mitigating losses to the center bias port. Several devices without a deflective structure were fabricated for comparison supporting this conclusion. The center currents for these devices were found to be considerably higher than any other drain port even when all the ports were the same size. With scaling, it is expected that the deflective structure will provide a more significant role. Since as the size of the device is reduced, a larger percentage of electrons will impact the deflective structure ballistically enhancing the gain further. A similar effect was observed in the ballistic bridge rectifier [1]. In Figure 2, the IV curve for a device formed near the edge wafer with 50 nm gate-channel spacing is shown. The device was biased with a fixed drain voltage of 4V and swept with a push-pull gate bias. The left gate is used as the reference in the charts (as an example of a push pull bias, when the left gate is at -0.1V, the right gate will be at +0.1V). While the geometry was slightly different than what is shown in Figure 1, the characteristic response is essentially identical between all geometries. We observe that for each drain, the current first increases as a function of gate voltage then decreases. The Figure 1: Pictured is a BDT with 500 nm gates (including the angled region) and 80 nm gate-channel spacing, the top-left and top right ports are drain ports, bottom left and right ports are gates, top port is a vdd bias port that controls gain, and the bottom port is the source. Dark regions indicate removed material.